Web Hosting Java, JSP, Tomcat 6, J2EE, Servlets, Struts, Jboss

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The Cost of Synchronization Multithreaded programming is a

The Cost of Synchronization Multithreaded programming is a tricky business and if you don’t watch your step you could get into trouble with race conditions, deadlock, starvation, and other landmines associated with concurrency. Defects resulting from race conditions are particularly difficult to debug. If concurrency is so delicate, why don’t we just synchronize everything and be done with it? From a performance standpoint, there are at least two good reasons why we should use synchronization very sparingly. First is the overhead of the synchronization mechanism itself. Somewhere, a lock must be acquired and released before and after the synchronized code. For instance, take the simple operation of integer increment. We will measure its speed with and without synchronization: class Counter { private long counter; private static long sharedCounter; public static void main(String args[]) { int n = Integer.parseInt(args[0]); Counter c = new Counter(); long start = System.currentTimeMillis(); // <+++ Start timing for (int i = 0; i < n; i++) { c.bumpCounter(); } long stop = System.currentTimeMillis(); // <+++ Stop timing System.out.println("Execution time = " + (stop - start)); } public void bumpCounter() { counter++; } public static synchronized void bumpSharedCounter() { sharedCounter++; } } We invoked this program using Java Counter 1000000 to execute one million iterations of the loop for (int i = 0; i < n; i++) { c.bumpCounter(); } where bumpCounter() is unsynchronized. We then replaced bumpCounter() with its synchronized counterpart bumpSharedCounter() for (int i = 0; i < n; i++) { c.bumpSharedCounter(); } The unsynchronized method ran almost two orders of magnitude faster than the synchronized one. Page 154
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The Cost of Synchronization Multithreaded programming is a

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Multithreaded and Synchronization Terminology This is not the

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Multithreaded and Synchronization Terminology This is not the

Multithreaded and Synchronization Terminology This is not the first time that we have run into synchronization terminology. We have already used terms such as synchronization, critical sections, race condition, and locks. We never really explained them, and it is time to step back now and clarify the terminology. Take a simple code statement such as x = x + 1; If two threads execute this statement, we expect the resulting value stored in x to be x+2. Any other value would be incorrect. The problem with this code statement is that it is not executed atomically. After compiling it into the native machine assembler instructions, it is actually broken into a small number of instructions: load x, r5 // load the value of x into register r5add r5, 1 // add 1 to register r5store r5, x // store the value of register r5 into x If two threads execute the above code at roughly the same time, their instruction execution could interleave in a way that would result in x+1 stored as the new value of x instead of x+2. That unfortunate interleaving of thread exe-cution is called a race condition. The solution to this race condition is to guarantee that this block of assembler statements executes atomically. We call that block a critical section. Once a thread enters a critical section, no other thread can enter until the first one leaves. In that case, we say that the two threads are synchronized and that the critical section is mutually exclusive. Because the variable x is accessed by more than a single thread, it is considered shared data. Critical sections always revolve around access to shared data. To guarantee safe access to shared data (and correct execution), we use a synchronized block or a synchronized method. To protect the variable x in x = x+1; we could use one of three options. The first is a synchronized method: class C { private int x; … public synchronized void plusOne() { x = x+1; } } The second option is a synchronized block: class C { private int x; … public void someMethod() { … synchronized (this) { x = x+1; } … } } Page 152
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Amdahl’s Law Amdhal’s law quantifies the fact that

Amdahl’s Law Amdhal’s law quantifies the fact that the sequential portion of an application will put a lid on its potential scalability. This law is best illustrated by a matrix multiplication example that consists of three stages: . Initialization read in the matrices data values. . Multiplication multiply the two matrices. . Presentation present the resulting matrix. Let’s assume further that the whole computation takes 10 ms, broken down as follows (these numbers are completely fictitious but help illustrate the point): . Initialization 2 ms . Multiplication 6 ms . Presentation 2 ms Over the years, many clever parallel algorithms have been developed to exploit multiprocessor architectures to speed up the second phase, that of matrix multiplication. The initialization and presentation phases are a different story. Practically, these two stages in the computation are sequential. In the ideal world, an unlimited number of parallel processors could, in theory, reduce the multiplication stage to 0 ms. But they would not help at all with the other two sequential stages, as shown by Figure 7.4. Figure 7.4. Potential speedup is limited In the figure, an unlimited number of parallel processors has only reduced a 10 ms computation to 4 ms. The multiplication phase has been reduced to 0 ms but the initialization and presentation stages still take 2 ms each. Looks as if 2.5x is the speedup limit for this particular application on any SMP system regardless of the number of processors. Sequential computations are the major roadblock on the way to scalability. In the following sections we will enumerate ways to eliminate or at least minimize sequential computations. Before we go there, we need to briefly clarify some terminology. Page 150

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Amdahl’s Law Amdhal’s law quantifies the fact that

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The SMP Architecture The name SMP already describes

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The SMP Architecture The name SMP already describes

The SMP Architecture The name SMP already describes its characteristics: . It is a multiprocessor (MP). The system consists of multiple identical CPUs. . It is symmetric. All processors have an identical view of the system. They all have the same capabilities. For example, they have identical access to any location in memory as well as to any I/O device. . Everything else is single. It has a single memory system, a single copy of the operating system, a single run queue. Figure 7.3 depicts the architecture. Figure 7.3. The SMP architecture Unless your application code bends over backwards, threads have no affinity to any particular CPU. The same thread may execute on CPU_1 in one particular time-slice and CPU_2 on the next time-slice. Another idea shown in Figure 7.3 is that multiple threads really do execute simultaneously. While thread T1 executes on CPU_1, thread T2 may very well execute on CPU_2. Since the scheduling entity is a thread, there’s nothing to prevent threads T1 and T2 from belonging to the same process. In this case, it is very likely that they will access the same memory locations on a regular basis. That brings us to the next issue: There is only one bus connecting the processors to the memory system. The bus is the major bottleneck in SMP systems and the chief reason why 256-way SMP machines are not commonplace. Bus contention would bring them to a grinding halt. The solution to bus contention is large on-chip caches one per processor. A large on-chip cache would make bus trips infrequent, but would raise a new problem: What if two distinct caches both have a copy of a variable, x, and one of the processors updates its private copy? The other cache might have a stale, incorrect, value for x; we hate when that happens. This is the cache consistency Page 148
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